2011 Judges
Dr. Nachiketh Potlapally, Security Validation Team Lead, Intel’s Security Center of Excellence
Nachiketh Potlapally works as a security validation team lead in Intel’s Security Center of Excellence. He has worked on improving security assurance of Intel processor and chipset products in client desktop and mobile systems, and was involved in validating security of key platform-level security technologies such as Trusted Execution Technology (TXT) and Active Management Technology (AMT). His research interests comprise investigating security of systems with respect to their hardware and software implementations in order to build secure systems, and he has published his research in peer-reviewed conferences and journals. He holds a PhD in Electrical Engineering from Princeton University.
Dr. Youngok Pino
Dr. Youngok Pino is an Electronics Engineer/Program Manager at the Information Directorate, Air Force Research Laboratory, Rome, NY. Dr. Pino is responsible for the research and development on advanced computing architecture technologies to provide secure computational capabilities to information systems. Her research areas include high assurance computing architectures, trusted computing and hardware design synthesis for trust and security.
Dr. Pino began her professional career at the International Business Machines (IBM), Burlington, VT and was involved in developing and implementing ASICs methodologies in the area of Physical Design, Signal/Power Routing, and Timing optimization and developing compact model analytic stress formulation for IBM’s most advanced 32nm node SOI and bulk CMOS technologies as well as passive compact modeling. She received her PhD in Electrical Engineering from Rensselaer Polytechnic Institute.
Dr. Sek Chai, Technical Manager, SRI International Sarnoff
Sek Chai leads an architecture team focused on embedded computing activities at SRI. He is working on secured and trusted design for embedded systems with applications in robotics, surveillance and intelligence. Prior to joining SRI Sarnoff, Dr. Chai developed imaging and video solutions for next generation mobile devices and home broadband products at Motorola Labs. He is a senior member of IEEE and ACM. He has authored or co-authored peer-reviewed technical papers and patents relating to system architecture hardware and rapid prototyping. He holds a PhD in Electrical Engineering from Georgia Tech.
Sergey Panasyuk
Sergey Panasyuk is employed as a Computer Scientist at the Air Force
Research Laboratory's Information Directorate in Rome NY. He joined AFRL
in 2008 and is assigned to the Trusted Systems Branch (AFRL/RITA). In
his current position; Sergey focuses on research and development of
technologies related to the application of advanced computing to
Information Assurance and Trusted Computing. Sergey has more than nine
years of professional experience as embedded system developer.
Sergey received his Bachelor of Science in Computer/Information Science
with Minor in Mathematics from SUNY Institute of Technology at
Utica/Rome in 2002. In 2008 he received Master of Science in
Computer/Information Science from the same institution.
